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مساء الخير

اصدار جديد V2.2.0.8

More Chip IC's Added
Fixed Bugs
With SREG edit, possibility to edit QE when the bit is set, otherwise it is disabled.
100ms delay between each busy status checks during SPI 25 erase
SREG remove protection popup for erase and write SPI memories.
ajout d'un delais de 10ms apres l'ecriture des status registers et 5ms dans chaque boucle de control